Roland Ver. 4.5 Informações Técnicas descarregar pdf (Página 45)

Chapter 4: Writing Rules 35

bigoutput littleoutput : text.g

generate text.g -$(subst output,,$@) > $@

is equivalent to

bigoutput : text.g

generate text.g -big > bigoutput

littleoutput : text.g

generate text.g -little > littleoutput

Here we assume the hypothetical program generate makes two types of output, one if

given ‘-big’ and one if given ‘-little’. See Section 8.2 [Functions for String Substi-

tution and Analysis], page 84, for an explanation of the subst function.

Suppose you would like to vary the prerequisites according to the target, much as the

variable ‘$@’ allows you to vary the recipe. You cannot do this with multiple targets in an

ordinary rule, but you can do it with a static pattern rule. See Section 4.11 [Static Pattern

Rules], page 36.

4.10 Multiple Rules for One Target

One ﬁle can be the target of several rules. All the prerequisites mentioned in all the rules

are merged into one list of prerequisites for the target. If the target is older than any

prerequisite from any rule, the recipe is executed.

There can only be one recipe to be executed for a ﬁle. If more than one rule gives a

recipe for the same ﬁle, make uses the last one given and prints an error message. (As a

special case, if the ﬁle’s name begins with a dot, no error message is printed. This odd

behavior is only for compatibility with other implementations of make. . . you should avoid

using it). Occasionally it is useful to have the same target invoke multiple recipes which are

deﬁned in diﬀerent parts of your makeﬁle; you can use double-colon rules (see Section 4.12

[Double-Colon], page 38) for this.

An extra rule with just prerequisites can be used to give a few extra prerequisites to many

ﬁles at once. For example, makeﬁles often have a variable, such as objects, containing a

list of all the compiler output ﬁles in the system being made. An easy way to say that all

of them must be recompiled if config.h changes is to write the following:

objects = foo.o bar.o

foo.o : defs.h

bar.o : defs.h test.h

$(objects) : config.h

This could be inserted or taken out without changing the rules that really specify how to

make the object ﬁles, making it a convenient form to use if you wish to add the additional

prerequisite intermittently.

Another wrinkle is that the additional prerequisites could be speciﬁed with a variable

that you set with a command line argument to make (see Section 9.5 [Overriding Variables],

page 103). For example,

extradeps=

$(objects) : $(extradeps)

means that the command ‘make extradeps=foo.h’ will consider foo.h as a prerequisite of

each object ﬁle, but plain ‘make’ will not.

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